scale 1:1 style 1: pin 1. base 2. collector 3. emitter 4. collector style 2: pin 1. gate 2. drain 3. source 4. drain style 3: pin 1. anode 2. cathode 3. anode 4. cathode style 4: pin 1. cathode 2. anode 3. gate 4. anode style 5: pin 1. gate 2. anode 3. cathode 4. anode 123 4 v s a k ? t ? seating plane r b f g d 3 pl m 0.13 (0.005) t c e j h dim min max min max millimeters inches a 0.235 0.245 5.97 6.35 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.027 0.035 0.69 0.88 e 0.018 0.023 0.46 0.58 f 0.037 0.045 0.94 1.14 g 0.090 bsc 2.29 bsc h 0.034 0.040 0.87 1.01 j 0.018 0.023 0.46 0.58 k 0.350 0.380 8.89 9.65 r 0.180 0.215 4.45 5.45 s 0.025 0.040 0.63 1.01 v 0.035 0.050 0.89 1.27 style 6: pin 1. mt1 2. mt2 3. gate 4. mt2 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. z z 0.155 ??? 3.93 ??? style 7: pin 1. gate 2. collector 3. emitter 4. collector xxxxxxxxx = device code a = assembly location ll = wafer lot y = year ww = work week yww xxxxxxxx xxxxx alyww x discrete integrated circuits ipak case 369d ? 01 issue c date 15 dec 2010 marking diagrams mechanical case outline package dimensions http://onsemi.com 1 ? semiconductor components industries, llc, 2002 october, 2002 ? rev. 0 case outline number: xxx document number: status: new standard: description: 98aon10528d on semiconductor standard ref to jedec to ? 251 ipak (dpak insertion mount) electronic versions are uncontrolled except when accessed directly from the document repository. printed versions are uncontrolled except when stamped ?controlled copy? in red. page 1 of 2
document number: 98aon10528d page 2 of 2 issue revision date o released for production. req. by l. gan 24 sep 2001 a changed standard to to ? 251, was to ? 252. req. by j. bechtold 24 nov 2003 b removed footprint. req. by j. leslie 03 dec 2003 c changed description to ipak. req. by j. jeong. 15 dec 2010 ? semiconductor components industries, llc, 2010 december, 2010 ? rev. 01c case outline number: 369d on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner.
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